Can I read Scalable Network-on-chip Architecture for Configurable Neural Networks on EtoBox?

Scalable Network-on-chip Architecture for Configurable Neural Networks by Dmitri Vainbrand; Ran Ginosar is a Computer Science article available to read on EtoBox.

What is Scalable Network-on-chip Architecture for Configurable Neural Networks about?

Providing highly flexible connectivity is a major architectural challenge for hardware implementation of reconfigurable neural networks. We perform an analytical evaluation and comparison of different configurable interconnect architectures (mesh NoC, tree, shared bus and point-to-point) emulating variants of two neural network topologies (having full and random configurable connectivity). We derive analytical expressions and asymptotic limits for performance (in terms of bandwidth) and cost (in terms of area and power) of the interconnect architectures considering three communication methods (unicast, multicast and broadcast). It is shown that multicast mesh NoC provides the highest performance/cost ratio and consequently it is the most suitable interconnect architecture for configurable neural network implementation. Routing table size requirements and their impact on scalability were analyzed. Modular hierarchical architecture based on multicast mesh NoC is proposed to allow large scale neural networks emulation. Simulation results successfully validate the analytical models and the asymptotic behavior of the network as a function of its size.

Who reads Scalable Network-on-chip Architecture for Configurable Neural Networks?

Author

Dmitri Vainbrand; Ran Ginosar

Publisher

Elsevier Science; Elsevier ; Elsevier BV (ISSN 0141-9331)

Published

2011

Language

EN

Field

Computer Science (Physical Sciences)