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Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees by Grot, Boris; Hestness, Joel; Keckler, Stephen W.; Mutlu, Onur is a Computer Science article available to read on EtoBox.

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Today's chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specialized accelerators are anticipated in the near future. In this paper, we propose and evaluate technologies to enable networks-on-chip (NOCs) to support a thousand connected components (Kilo-NOC) with high area and energy efficiency, good performance, and strong quality-of-service (QOS) guarantees. Our analysis shows that QOS support burdens the network with high area and energy costs. In response, we propose a new lightweight topology-aware QOS architecture that provides service guarantees for applications such as consolidated servers on CMPs and real-time SOCs. Unlike prior NOC quality-of-service proposals which require QOS support at every network node, our scheme restricts the extent of hardware support to portions of the die, reducing router complexity in the rest of the chip. We further improve network area- and energy-efficiency through a novel flow control mechanism that enables a single-network, low-cost elastic buffer implementation. Together, these techniques yield a heterogeneous Kilo-NOC architec

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Author

Grot, Boris; Hestness, Joel; Keckler, Stephen W.; Mutlu, Onur

Publisher

Association for Computing Machinery; Association for Computing Machinery (ACM) (ISSN 0163-5964)

Published

2011

Language

EN

Field

Computer Science (Physical Sciences)