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About this Engineering article
3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections by Khan, Navas; Yu, Li Hong; Pin, Tan Siow; Ho, Soon Wee; Kripesh, Vaidyanathan; Pinjala, Damaruganath; Lau, John H.; Chuan, Toh Kok is a Engineering article available to read on EtoBox.
It is typically read by researchers, students, and practitioners in Engineering.
- Author
- Khan, Navas; Yu, Li Hong; Pin, Tan Siow; Ho, Soon Wee; Kripesh, Vaidyanathan; Pinjala, Damaruganath; Lau, John H.; Chuan, Toh Kok
- Publisher
- Institute of Electrical and Electronics Engineers; Institute of Electrical and Electronics Engineers Inc.; Institute of Electrical and Electronics Engineers (IEEE) (ISSN 2156-3950)
- Published
- 2013
- Language
- EN
- Field
- Engineering (Physical Sciences)