About this scholarly article
Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat No 04CH37521) DCAS-04) - A 16b 65 MSps pipeline ADC core with 230 fs clock jitter in 3.3 V SiGe BiCMOS: from simulation to silicon by Zanchi, ; Tsay, ; Papantonopoulos, is a scholarly article available to read on EtoBox.
- Author
- Zanchi, ; Tsay, ; Papantonopoulos,
- Publisher
- IEEE
- Published
- 2004