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Digital Functions: DRAM Controller Overview by jochenp is a document available to read on EtoBox.
What is Digital Functions: DRAM Controller Overview about?
The document describes a DRAM controller that manages access to DRAM memory. It consists of several components: 1) A REFREQ unit that generates refresh requests using an 8-bit counter to refresh DRAM every 256 clock cycles. 2) A RAS_CAS generator that produces row address strobe (/RAS) and column address strobe (/CAS) signals to control memory access and refresh processes. 3) A swapper that alternates the /RAS and /CAS patterns for memory access and refresh. 4) An arbiter state machine that prioritiz
- Author
- jochenp
- Language
- EN