About this document
Main Memory: DRAM and SRAM Overview by Khadija Ali Baig is a document available to read on EtoBox.
1. Use wider memory buses and increase data transfer rates through technologies like DDR, DDR2, DDR3, and DDR4 to boost bandwidth. 2. Add more banks to DRAM devices to allow interleaving of memory accesses across banks for better parallelism. 3. Leverage row buffers by scheduling memory accesses to maximize row buffer hits, avoiding full row access times for consecutive accesses to the same row.
- Author
- Khadija Ali Baig
- Language
- EN