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The document presents a novel approach to designing high power-efficient finite impulse response (FIR) filters using a three-four inexact adder-integrated Booth multiplier (TFIE-BM). This method aims to optimize area, latency, and power consumption through the use of a spotted hyena optimizer (SHO) to determine optimal filter coefficients. The proposed design significantly improves performance metrics, achieving reductions in power consumption by 69.5%, area usage by 58.45%, and delay by 73.8% compared to t

Author

IAES International Journal of Robotics and Automation

Language

EN