Opening book details…
About this scholarly article
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) - Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing by Yang, Kai; Karam, Robert; Bhunia, Swarup is a scholarly article available to read on EtoBox.
- Author
- Yang, Kai; Karam, Robert; Bhunia, Swarup
- Publisher
- IEEE
- Published
- 2017