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The Performance Advantage of Applying Compression to the Memory System by Nihar R. Mahapatra; Jiangjiang Liu; Krishnan Sundaresan is a Computer Science article available to read on EtoBox.

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The memory system stores information comprising primarily instructions and data and secondarily address information, such as cache tag fields. It interacts with the processor by supporting related traffic (again comprising addresses, instructions, and data). Continuing exponential growth in processor performance, combined with technology, architecture, and application trends, place enormous demands on the memory system to permit this information storage and exchange at a high-enough performance (i.e., to provide low latency and high bandwidth access to large amounts of information). This paper comprehensively analyzes the redundancy in the information (addresses, instructions, and data) stored and exchanged between the processor and the memory system and evaluates the potential of compression in improving performance of the memory system. Analysis of traces obtained with Sun Microsystems' Shade simulator simulating SPARC executables of nine integer and six floating-point programs in the SPEC CPU2000 benchmark suite yield impressive results. Well-designed compression schemes may provide benefits in performance that far outweigh the extra time and logic for compression and decompress

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Author

Nihar R. Mahapatra; Jiangjiang Liu; Krishnan Sundaresan

Publisher

Association for Computing Machinery (ACM)

Published

2002

Language

EN

Field

Computer Science (Physical Sciences)