About this document
FSK Demodulation Using PLL Techniques by dangvuduong is a document available to read on EtoBox.
The document discusses FSK demodulation using a PLL circuit. It explains that most FSK modulators use a PLL consisting of a phase detector, low-pass filter, and voltage-controlled oscillator (VCO) to keep the input and output frequencies locked. The presented FSK demodulator circuit uses an IC 4046 PLL with a free running frequency of 320 kHz. When an FSK signal with frequencies of 320 kHz and 640 kHz is input, the PLL locks to 320 kHz at the output, producing the raw demodulated data signal. This signal is
- Author
- dangvuduong
- Language
- EN