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Low Power SRAM Design Strategies by Harshit R is a document available to read on EtoBox.

What is Low Power SRAM Design Strategies about?

The document discusses various SRAM cell designs and their power consumption. It describes SRAM cells that use 4T, 6T, 7T, 9T, 10T designs to reduce power. The 7T SRAM cell is highlighted as reducing write power by 16-54% compared to 6T. An ultra low power 8T SRAM cell is also proposed, consuming less power than conventional designs. Research on CNTFET based SRAM cells shows they can consume less power than CMOS-based cells under ideal conditions. Overall, the document analyzes different SRAM architectures

Author

Harshit R

Language

EN