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What is Gate Oxide Leakage Current Analysis and Reduction For VLSI Circuits about?

This paper addresses the growing issue of gate oxide leakage current at the circuit level. We develop a fast approach to analyze the total leakage power of a large circuit block, considering both gate and subthreshold leakage ( sub ) interaction between sub and gate complicates analysis in arbitrary CMOS topologies.

Author

NK NK

Language

EN