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About this Computer Science article
FAIR: a hardware architecture for real-time 3-D image registration by Castro-Pareja, C.R.; Jagadeesh, J.M.; Shekhar, R. is a Computer Science article available to read on EtoBox.
It is typically read by researchers, students, and practitioners in Computer Science.
- Author
- Castro-Pareja, C.R.; Jagadeesh, J.M.; Shekhar, R.
- Publisher
- IEEE; Institute of Electrical and Electronics Engineers; Institute of Electrical and Electronics Engineers (IEEE) (ISSN 1089-7771)
- Published
- 2003
- Language
- EN
- Field
- Computer Science (Physical Sciences)
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