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2013 IEEE 63rd Electronic Components and Technology Conference - Full integration of a 3D demonstrator with TSV first interposer, ultra thin die stacking and wafer level packaging by Pares, G.; Karoui, C.; Zaid, A.; Dosseul, F.; Feron, M.; Attard, A.; Klug, G.; Luesebrink, H.; Martinschitz, K.; Launay, N.; Belhenini, S.; Simon, G. is a scholarly article available to read on EtoBox.

Author
Pares, G.; Karoui, C.; Zaid, A.; Dosseul, F.; Feron, M.; Attard, A.; Klug, G.; Luesebrink, H.; Martinschitz, K.; Launay, N.; Belhenini, S.; Simon, G.
Publisher
IEEE
Published
2013
Language
EN

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