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Agglomerative-based Flip-flop Merging and Relocation for Signal Wirelength and Clock Tree Optimization by Sean Shih-Ying Liu; Wan-Ting Lo; Chieh-Jui Lee; Hung-Ming Chen is a Computer Science article available to read on EtoBox.

What is Agglomerative-based Flip-flop Merging and Relocation for Signal Wirelength and Clock Tree Optimization about?

In this article, we propose a flip-flop merging algorithm based on agglomerative clustering. Compared to previous state-of-the-art on flip-flop merging, our proposed algorithm outperforms that of Chang et al. [2010] and Wang et al. [2011] in all aspects, including number of flip-flop reductions, increase in signal wirelength, displacement of flip-flops, and execution time. Our proposed algorithm also has minimal disruption to original placement. In comparison with Jiang et al. [2011], Wang et al. [2011], and Chang et al. [2010], our proposed algorithm has the least displacement when relocating merged flip-flops. While previous works on flip-flop merging focus on the number of flip-flop reduction, we further evaluate the power consumption of clock tree after flip-flop merging. To further minimize clock tree wirelength, we propose a framework that determines a preferable location for relocated merged flip-flops for clock tree synthesis (CTS). Experimental results show that our CTS-driven flip-flop merging can reduce clock tree wirelength by an average of 7.82% with minimum clock network power consumption compared to all of the previous works.

Who reads Agglomerative-based Flip-flop Merging and Relocation for Signal Wirelength and Clock Tree Optimization?

Author

Sean Shih-Ying Liu; Wan-Ting Lo; Chieh-Jui Lee; Hung-Ming Chen

Publisher

Association for Computing Machinery; Association for Computing Machinery (ACM) (ISSN 1084-4309)

Published

2013

Language

EN

Field

Computer Science (Physical Sciences)