About this scholarly article

SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California (Sunday 21 February 2010)] Design for Manufacturability through Design-Process Integration IV - Systematic failure debug and defective pattern extraction for FPGA product yield improvement by Chen, Cinti; Rieger, Michael L.; Thiele, Joerg; Zhao, Joe W.; Zhang, Ping; Xu, Raymond Y. is a scholarly article available to read on EtoBox.

Author

Chen, Cinti; Rieger, Michael L.; Thiele, Joerg; Zhao, Joe W.; Zhang, Ping; Xu, Raymond Y.

Publisher

SPIE

Published

2010