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Peak spacing statistics in silicon single-electron transistors: Size and gate oxide thickness dependence by X. Jehl; M. Hofheinz; M. Boehm; M. Sanquer; G. Molas; M. Vinet; S. Deleonibus is a Physics and Astronomy article available to read on EtoBox.

What is Peak spacing statistics in silicon single-electron transistors: Size and gate oxide thickness dependence about?

We measured the fluctuations of the addition spectra versus the size of the quantum dot in low-mobility gated nanowires etched in silicon-on-insulator thin films. The standard deviation of the peak spacing distribution in the high electron concentration regime is found to scale as the inverse surface area of the dot and its absolute value is comparable to the energy spacing D of the one-particle spectrum. We have also varied the gate oxide thickness for dots with the same size. Away from the first oscillations we observe that the gate capacitance is remarkably constant over a large gate voltage range, whatever the dimensions of the dot and the gate oxide thickness. In these nanowires the confinement of the electronic wavefunctions is not provided by intentional tunnel junctions but by the quasi-1D nanowire itself, which behaves at low temperature like a disordered insulator. Coulomb blockade diamonds give a direct measurement of the small capacitance of those access regions.

Who reads Peak spacing statistics in silicon single-electron transistors: Size and gate oxide thickness dependence?

Author

X. Jehl; M. Hofheinz; M. Boehm; M. Sanquer; G. Molas; M. Vinet; S. Deleonibus

Publisher

Elsevier Science; Elsevier ; Elsevier BV (ISSN 1386-9477)

Published

2006

Language

EN

Field

Physics and Astronomy (Physical Sciences)