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This document discusses EMI root cause analysis methods for synchronous buck converters, highlighting various techniques such as time-domain voltage measurement, near-field scanning, and TEM cell measurements. It emphasizes the impact of loop inductance and capacitance on EMI emissions, particularly around 160 MHz, and presents a case study demonstrating how modifications to the decap-MOSFET loop can mitigate emissions. The findings aim to inform optimal PCB design to reduce EMI issues in DC/DC converters.

Author

havadana

Language

EN