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This paper presents a high-speed and energy-efficient approximate multiplier, termed RoBA multiplier, designed for digital signal processing applications. The proposed method enhances speed and energy efficiency by rounding operands to the nearest power of two, allowing for reduced computational complexity at the cost of minimal error. The RoBA multiplier is implemented in Verilog HDL and evaluated against traditional exact multipliers, demonstrating superior performance in terms of speed, area, and power c
- Author
- gokikayal1998
- Language
- EN