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Low-Power Variation-Tolerant Design in Nanometer Silicon by Bhunia, Swarup(Editor) is a nonfiction available to read on EtoBox.

What is Low-Power Variation-Tolerant Design in Nanometer Silicon about?

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes. Erscheinungsdatum: 24.11.2010

Who reads Low-Power Variation-Tolerant Design in Nanometer Silicon?

Author

Bhunia, Swarup(Editor)

Publisher

Springer Science+Business Media, LLC; Springer

Published

2019

Language

EN

ISBN

9781489981578

Category

nonfiction

Subjects

Engineering, Computer Science, Stem