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Contents 7 Foreword 9 (Phase-Locked Loops: Structure, Functions and Applications) 9 Preface 11 Chapter 1 17 A New Phase-Locked Loop Structure in Hybrid CMOS-Memristor Technology 17 Abstract 17 1. Introduction 18 2. Molecular and Ionic Thin Film 19 2.1. Titanium Dioxide 20 2.2. HP Memristor Model 22 2.3. Current -Voltage Relation of Memristor 23 3. Novel Hybrid Phase-Locked Loop 28 3.1. Phase Detector 29 3.2. Charge Pump/Loop Filter 30 3.3. Voltage Controlled Oscillator 32 3.4. Frequency Divider 36 4. Phase Noise and Jitter Study in CMOS Voltage-Controlled Oscillator (VCO) Considering Hot Carrier Effects (HCE) and Negative Bias Temperature Instability (NBTI) 38 4.1. HCE and NBTI Models for Single-ended VCO 38 4.2. Phase Noise Modeling of Voltage Controlled Oscillator 44 5. Power and Temperature Analyses of Proposed Model 47 Conclusion and Future Work 51 Acknowledgments 52 References 52 Chapter 2 59 Biological Synchronization Modeled by PLLs and Pitch Detection 59 Abstract 59 1. Introduction 60 2. Basic PLL in Discrete Time 61 2.1. PLL Description in Continuous Time 61 2.2. PLL Linear Description and Discrete Time Equivalent 65 2.3. Schematic Description of PLL and Associated Circu
- Author
- Sharma, Shambhu N.;
- Language
- EN
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