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This document contains calculations and analysis of various CMOS inverter circuit configurations. Key details include: - Calculation of static current, output voltage, propagation delay, power dissipation and other metrics for different sized NMOS and PMOS transistors. - Analysis of transistors operating in saturation vs triode regions and the impact on output voltage. - Equivalent resistances of transistors in series vs parallel configurations. - Propagation delays are calculated in the 0.1-1ns range

Author

ee206023

Language

EN