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A Buffer Minimization Problem for the Design of Embedded Systems by Alix Munier Kordon; Jean-Baptiste Note is a Engineering article available to read on EtoBox.

We consider a set of tasks, each of them is composed by a set of sequential operations, and a set of buffers. Each buffer b is defined between two tasks T i and T j , and is managed as a FIFO structure. Some operations from T i write data to the buffer b, others from T j get data from b. The writings and readings generate precedence constraints between the operations. The limitation of the size of the buffers generates another set of precedence constraints between them and circuits in the precedence graph may appear. In this case, there is no feasible schedule for the operations. The aim is to determine the size of each buffer such that the global surface of the buffers is minimized and there is no circuit in the precedence graph. We prove that this problem is polynomial for two tasks using a flow algorithm. We also prove that it is NP-complete in the strong sense for three tasks.

It is typically read by researchers, students, and practitioners in Engineering.

Author
Alix Munier Kordon; Jean-Baptiste Note
Publisher
Elsevier Science; Elsevier ; Elsevier BV (ISSN 0377-2217)
Published
2005
Language
EN
Field
Engineering (Physical Sciences)