Can I read Design of Dynamic Latch Comparator For 8-Bit SAR ADC in 90nm Technology on EtoBox?

Design of Dynamic Latch Comparator For 8-Bit SAR ADC in 90nm Technology by kirthana1702 is a document available to read on EtoBox.

What is Design of Dynamic Latch Comparator For 8-Bit SAR ADC in 90nm Technology about?

The document discusses the design and simulation of a dynamic latch comparator for an 8-bit low-power Successive Approximation Register (SAR) ADC implemented in 90nm CMOS technology. It highlights the use of a bootstrapped switch and a capacitive Digital-to-Analog Converter (CDAC) to enhance performance, achieving high-speed operation at low power consumption. The results demonstrate the effectiveness of the design in terms of accuracy, efficiency, and suitability for low-power applications.

Author

kirthana1702

Language

EN