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2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - A SBST strategy to test microprocessors' Branch Target Buffer by Bernardi, P.; Ciganda, L.; Grosso, M.; Sanchez, E.; Sonza Reorda, M. is a scholarly article available to read on EtoBox.
- Author
- Bernardi, P.; Ciganda, L.; Grosso, M.; Sanchez, E.; Sonza Reorda, M.
- Publisher
- IEEE
- Published
- 2012
- Language
- EN
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