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2021 - Exploration of A Low-Power CMOS Voltage Squarer by vctrop is a document available to read on EtoBox.
This paper presents a low-power CMOS voltage squarer circuit with a total power consumption of 500.9 nW at 1.8 V, capable of operating with constant gain up to 250 kHz. The proposed circuit simplifies the design of existing voltage multipliers, achieving a 50% reduction in area and power dissipation while maintaining performance verified through simulations. The study also introduces an inverted squarer that leverages differences in carrier mobility to achieve higher gains compared to the baseline squarer.
- Author
- vctrop
- Language
- EN