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This paper presents a low-noise asynchronous SAR-assisted time-interleaved SAR (SATI-SAR) ADC designed for operation at a supply voltage of 0.6 V, achieving a resolution of 12 bits and a conversion rate of 10 MS/s. The architecture incorporates a gain-boosting dynamic pre-amplifier and a dual-mode clock generator to enhance noise performance and conversion speed while maintaining low power consumption. The prototype demonstrates an effective signal-to-noise ratio and minimal differential and integral nonlin

Author

alexfunghi123

Language

EN