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Razor Latch: Circuit-Level Timing Speculation by Raghu Nandan Chilukuri is a document available to read on EtoBox.

The Razor latch system developed at the University of Michigan in 2003 speculatively runs a pipeline at a higher clock frequency than the worst-case timing allows. It uses shadow latches to detect and recover from timing errors. When a mismatch between the regular and shadow latch contents is detected, it either stalls the entire pipeline or uses counterflow pipelining to recompute the errant stage with the correct values from the shadow latch. This speculation improves performance but increases power consu

Author

Raghu Nandan Chilukuri

Language

EN