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About this Engineering article
Design of low power buffer using driver-array for on-chip IPs interconnection by Fei Qiao, ; Huazhong Yang, ; Hui Wang, is a Engineering article available to read on EtoBox.
It is typically read by researchers, students, and practitioners in Engineering.
- Author
- Fei Qiao, ; Huazhong Yang, ; Hui Wang,
- Publisher
- IEEE; Institute of Electrical and Electronics Engineers; Institute of Electrical and Electronics Engineers (IEEE) (ISSN 0018-9499)
- Published
- 1988
- Field
- Engineering (Physical Sciences)