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About this Engineering article
A Binary-Tree Hierarchical Multiple-Chip Architecture for Real-Time Large-Scale Learning Processor Systems by Y. Ma; T. Shibata is a Engineering article available to read on EtoBox.
It is typically read by researchers, students, and practitioners in Engineering.
- Author
- Y. Ma; T. Shibata
- Publisher
- Institute of Pure and Applied Physics; Japan Society of Applied Physics; IOP Publishing (ISSN 0021-4922)
- Published
- 2010
- Field
- Engineering (Physical Sciences)