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. SCHEME OF EXAMINATION & SYLLABI for Master of Technology (VLSI Design) Regular Guru Gobind Singh Indraprastha University Kashmere Gate, Delhi – 110403 [INDIA] www.ipu.ac.in 1 Syllabus of M.Tech. (VLSI Design), approved by BoS of USIT on 12th January, 09 and 26th Academic Council Meeting on 19th January, 09 w.e.f academic session 2009-10. . Eligibility Condition B. Tech / B.E in Electronics & Communication / Electronics / Computer Science / Information Technology or equivalent degree wit

Author

Abhinav Singh

Language

EN