Can I read Design A 3-Transistor Based DRAM Cell With Low Power and High Speed on EtoBox?

Design A 3-Transistor Based DRAM Cell With Low Power and High Speed by tarushree.varshney is a document available to read on EtoBox.

What is Design A 3-Transistor Based DRAM Cell With Low Power and High Speed about?

The paper presents a novel 3-transistor based DRAM cell (3T1D) that replaces the conventional capacitor with a gated diode, aiming to reduce power consumption and leakage current. Simulation results indicate that the 3T1D DRAM cell consumes significantly less power and exhibits faster read speeds compared to the traditional 3T DRAM cell. The findings demonstrate a 77% reduction in leakage current and an average power consumption in nano Watts, showcasing the advantages of the proposed design in 45nm technol

Author

tarushree.varshney

Language

EN