Opening book details…
Can I read Verilog HDL: A Guide to Digital Design and Synthesis [With CDROM] on EtoBox?
Verilog HDL: A Guide to Digital Design and Synthesis [With CDROM] by Samir Palnitkar; [foreword by Prabhu Goel] is a nonfiction available to read on EtoBox.
What is Verilog HDL: A Guide to Digital Design and Synthesis [With CDROM] about?
Verilog HDL is a language for digital design, just as C is a language for programming. This complete Verilog HDL reference progresses from the basic Verilog concepts to the most advanced concepts in digital design. Palnitkar covers the gamut of Verilog HDL fundamentals, such as gate, RTL, and behavioral modeling, all the way to advanced concepts, such as timing simulation, switch level modeling, PLI, and logic synthesis. Verilog HDL is a hardware description language (with a user community of more than 50,000 active designers) used to design and document electronic systems. This completely updated reference progresses from basic to advanced concepts in digital design, including timing simulation, switch level modeling, PLI, and logic synthesis.
Who reads Verilog HDL: A Guide to Digital Design and Synthesis [With CDROM]?
It is typically read by self-directed learners exploring a subject in depth.
Common subject areas: history, science, philosophy, social sciences.
- Author
- Samir Palnitkar; [foreword by Prabhu Goel]
- Publisher
- Prentice Hall PTR
- Published
- 2003
- Language
- EN
- ISBN
- 9780130449115
- Category
- nonfiction
- Subjects
- Engineering, Technology, Stem
Other editions & translations
More by Samir Palnitkar; [foreword by Prabhu Goel]
Browse all works by Samir Palnitkar; [foreword by Prabhu Goel]
Similar books
- Digital Design and Synthesis With Verilog Hdl. — Eli Sternheim, Rajvir Singh, Rajeev Madhavan, Yatin Trivedi (1993)
- Advanced Digital Design with the Verilog(TM) HDL — Michael D. Ciletti (2010)
- HDL with Digital Design :: VHDL and Verilog — Botros, Nazeih, 1945- author (2015)
- Digital Design : with an Introduction to the Verilog HDL, VHDL, and System Verilog — Mano, M Morris R; Ciletti, Michael D (2017)
- Digital VLSI Design and Simulation with Verilog — Suman Lata Tripathi; Sobhit Saxena; Sanjeet Kumar Sinha; Govind Singh Patel (2021)
- Verilog HDL : Digital Design and Modeling — Joseph J. F Cavanagh (2007)