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Low Power XOR-XNOR Gate Design by Cristian Taglia is a document available to read on EtoBox.

What is Low Power XOR-XNOR Gate Design about?

This document proposes a new 6-transistor design for an XOR-XNOR gate aimed at low power applications. The author simulates the proposed design using 65nm CMOS technology and compares it to previous designs in terms of delay, power consumption, and power-delay product (PDP) across a range of supply voltages. The simulation results show the proposed design has lower power dissipation and PDP than previous designs, especially at lower supply voltages, making it well-suited for low-power applications.

Author

Cristian Taglia

Language

EN