About this document
RTL Design and Synthesis Overview by Siam Hasan is a document available to read on EtoBox.
The document discusses the basics of RTL design and synthesis. It covers stages of synthesis such as identifying time-based state machines, inferring logic and state elements, performing technology mapping, and technology-dependent optimizations. It also discusses simulation versus synthesis, notes before design and synthesis, constraints, logic synthesis examples, memory types and mapping, technology-dependent optimizations, DC flow for synthesis, reading files, constraint types, and using floorplan physic
- Author
- Siam Hasan
- Language
- EN