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Fault Simulation Techniques in VLSI by Debashis Sahu is a document available to read on EtoBox.

What is Fault Simulation Techniques in VLSI about?

The document discusses fault simulation which is used to determine the quality of a set of test vectors for detecting faults in a circuit. It can be used for test grading, test generation, fault diagnosis, and design for test. Fault simulation algorithms discussed include serial, parallel, parallel pattern single fault propagation, and deductive simulation. Key concepts covered are fault equivalence, dominance, masking, and dropping.

Author

Debashis Sahu

Language

EN