About this document
Full Adder Implementation with Decoders by Noman Khan is a document available to read on EtoBox.
This document describes a lab experiment on modeling digital logic circuits to implement a full adder using 2, 2x4 decoders. The objectives are to implement a full adder using a 2x4 decoder. It introduces flip-flops including SR, JK, and D flip-flops. The procedure describes designing the circuit on a logic trainer and observing the outputs. Results show the truth tables for SR, JK, and D flip-flops. Circuit diagrams of the different flip-flops are also presented. The conclusions discuss learning about diff
- Author
- Noman Khan
- Language
- EN