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What is CMOS Inverter Design and Analysis about?

The document describes an experiment to measure the propagation delay of a CMOS inverter and analyze its variation with supply voltage. TSPICE simulations were run with different supply voltages (Vdd) ranging from 5V to 2.5V. The propagation delay was measured between the 50% transition points of the input and output waveforms. The results showed that decreasing the supply voltage decreased the propagation delay times Tphl and Tplh.

Author

Sanjay Sahai

Language

EN