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Can I read Logic Design and Verification Using System Verilog on EtoBox?
Logic Design and Verification Using System Verilog by Donald E Thomas is a nonfiction available to read on EtoBox.
What is Logic Design and Verification Using System Verilog about?
The book assumes a basic background in logic design and software programming concepts. It is directed at students, designers who want to update their skills from Verilog or VHDL, and, to students in VLSI design and advanced logic design courses that include verification and design topics. The book starts with a tutorial introduction on hardware description languages and simulation, proceeds to the register-transfer design topics of combinational and finite state machine (FSM) design ; covers the design of FSM-datapath designs and their interfaces, including SystemVerilog interfaces ; then moves to the more advanced topics of writing testbenches including using assertions and functional coverage.--Paraphrased from distributor's web site
Who reads Logic Design and Verification Using System Verilog?
It is typically read by self-directed learners exploring a subject in depth.
Common subject areas: history, science, philosophy, social sciences.
- Author
- Donald E Thomas
- Publisher
- CreateSpace; CreateSpace Independent Publishing Platform; Createspace Independent Publishing Platform
- Published
- 2016
- Language
- EN
- ISBN
- 9785970606193
- Category
- nonfiction
- Subjects
- Engineering, Computer Science, Stem
Other editions & translations
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Browse all works by Donald E Thomas
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