About this document
AES 128 Encryption on FPGA Using VHDL by ALEX SAGAR is a document available to read on EtoBox.
- Author
- ALEX SAGAR
- Language
- EN
AES 128 Encryption on FPGA Using VHDL by ALEX SAGAR is a document available to read on EtoBox.
The document discusses AES 128 encryption/decryption implemented on an FPGA. It describes the AES algorithm which can encrypt and decrypt digital data using 128-bit keys. The author