Skip to content

Opening book details…

About this Engineering article

Heterojunction Negative-Capacitance Tunnel-FET as a Promising Candidate for Sub-0.4V VDD Digital Logic Circuits by Sourav Guha; Prithviraj Pachal is a Engineering article available to read on EtoBox.

It is typically read by researchers, students, and practitioners in Engineering.

Author
Sourav Guha; Prithviraj Pachal
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Published
2021
Field
Engineering (Physical Sciences)

More by Sourav Guha; Prithviraj Pachal

Browse all works by Sourav Guha; Prithviraj Pachal