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The document discusses circuit-level exploration of ternary logic using memristors and MOSFETs. It proposes various ternary logic cells and circuitry, including a balanced ternary full-adder and memristor-based ternary pulsed-latch. It highlights design issues with memristor-based gates like signal distortion and high static current, and presents solutions.

Author

Tejendra Dixit

Language

EN