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Transient Latch-Up Testing for ICs by kluu61 is a document available to read on EtoBox.

Transient latch-up (TLU) testing is proposed as a new method to test CMOS devices for susceptibility to latch-up. TLU testing injects current into the IC substrate through a forward-biased diode junction using a brief negative voltage pulse to the power supply pin, rather than through a reversed-biased junction as in other methods. This allows it to test the device core without destroying the circuit. When applied to a sample device, a TLU pulse caused the supply current to abruptly rise after the pulse and

Author

kluu61

Language

EN