About this document

Fault-Tolerant TPU Design Strategies by majunhuiuwe is a document available to read on EtoBox.

The document summarizes a study on analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator. It finds that even low fault rates as low as 0.006% can significantly reduce the classification accuracy of the baseline Tensor Processing Unit (TPU). It then proposes two novel strategies, fault-aware pruning and fault-aware pruning plus retraining, that enable the TPU to operate at fault rates of up to 50% with negligible drops in classification accuracy below 0.

Author

majunhuiuwe

Language

EN