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What is Mirror Adder vs CMOS Full Adder about?
This document analyzes and compares a Full Adder block implemented using a traditional CMOS logic design and an improved design called a MIRROR ADDER in 180nm technology. The CMOS Full Adder is implemented directly from the logic equations, while the MIRROR ADDER exploits intermediate signals like Generate, Propagate, and Delete to optimize the circuit for speed. Simulation results show the MIRROR ADDER has lower delay between inputs and outputs while consuming similar power as the CMOS design.
- Author
- Sovan Ghosh
- Language
- EN