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Proceedings Design, Automation and Test in Europe - On the reuse of symbolic simulation results for incremental equivalence verification of switch-level circuits by Ribas-Xirgo, L.; Carrabina-Bordoll, J. is a scholarly article available to read on EtoBox.

Author
Ribas-Xirgo, L.; Carrabina-Bordoll, J.
Publisher
IEEE Comput. Soc
Published
1998
Language
EN

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