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What is FPGA Fault Tolerance Hardware Controller about?

The possibilities of the defect increases as there is increase in the densities which is dependant on the technology. The cost of testing increases according to the complication of the technology. In Nanotechnology the chances of these types of defects is enchanced. Hence, feature architecture has to be defect tolerant. In regular structure like FPGA, redundancy is commonly used for fault tolerance. In this work we present a solution in which configuration bit-stream of FPGA is modified by a hardware contro

Author

iserp

Language

EN