About this document

XC9500 CPLD Architecture Overview by venkatesh is a document available to read on EtoBox.

The document discusses the architecture of Xilinx XC9500 CPLDs. It describes the key components including function blocks with 18 macrocells each, a fully populated FastCONNECT switch matrix connecting the blocks, and I/O blocks. Each macrocell has 5 product terms by default but can be configured flexibly. Common logic functions like registers and counters use few product terms. The architecture provides high connectivity and flexibility to optimize designs.

Author

venkatesh

Language

EN