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Instruction Code Compression Method by Renuka Prasad A is a document available to read on EtoBox.

What is Instruction Code Compression Method about?

The document proposes and evaluates a system for compressing instruction code. An encoder compresses the code, and a hardware decoder decompresses it in real time during processor fetch cycles. Testing showed the system could reduce instruction size by 5-12%, allowing more code to fit in cache and reducing memory fetch misses. The encoder uses Huffman coding and the decoder is implemented in VHDL to integrate with a LEON2 processor model. Overall the results indicate instruction compression provides benefit

Author

Renuka Prasad A

Language

EN