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This paper presents a novel arithmetic tracking algorithm for successive approximation ADCs that reduces energy dissipation during low activity signal periods by minimizing the number of required bit-cycles. The proposed method maintains precision and sampling rate while achieving significant power savings, demonstrated through simulations of a 10-bit tracking SAR ADC. Results indicate energy dissipation ranging from 5.8 µW to 27.6 µW across various sampling rates, making it suitable for applications involv

Author

janamani

Language

EN